1. Technical Field
Embodiments described herein relate to integrated circuit layouts and designs. More particularly, the embodiments described herein relate to analyzing integrated circuit designs and modifying the integrated circuit design based on the design analysis.
2. Description of Related Art
For deep sub-micron technologies, IR drop (voltage drop across the device) in the power grid of an integrated circuit due to switching activity (e.g., high-speed switching activity) may have performance implications, especially for high-speed integrated circuits. Typically, in order to ensure voltage stability (and minimize IR drop) during high-speed switching events, an integrated circuit design may be analyzed to make sure there is a sufficient number of decoupling capacitors (dcaps) placed locally around each high-speed switching cell (e.g., clock buffers) in the design so that there is enough charge available for each high-speed switching cell. The design may also be analyzed to make sure that the dcaps associated with a high-speed switching cell are located within a certain distance from the cell. Having the dcaps closer to the high-speed switching cell increases effectiveness of the dcaps.
For a typical integrated circuit design, the number of high-speed switching cells (e.g., clock buffers) may be in the thousands while the number of dcaps, or dcap cells, may be in the millions. A conventional approach to analyzing the integrated circuit design is to check the location of each high-speed switching cell against the location of all the dcaps in the design using a computer processor. Such an approach may, however, be time consuming and cumbersome as it would require on the order of 1 billion checks between switching cells and dcaps in a typical integrated circuit design. For example, an integrated circuit design with 15,000 high-speed switching cells (clock buffers) and 5 million dcaps may take around 11 hours to check using the computer processor. Additionally, it may be difficult using this approach to ensure accuracy in associating dcaps with individual switching cells if neighboring switching cells are relatively close together (e.g., the neighboring switching cells are a distance apart that is less than the allowable distance between a switching cell and a dcap).